(1) Field of the Invention
The present invention generally relates to a clock matching apparatus which is appropriate for a data reproduction system of a data storage device, such as an optical disk drive, a magnetic disk drive or a magneto-optical disk drive. More particularly, the present invention relates to a clock matching apparatus which supplies a clock signal to a sampler of a data reproduction system in which a readout signal obtained from a storage medium is sampled periodically at sampling instants synchronized with the clock signal, so that the written data is reconstructed from the samples through the Viterbi algorithm.
(2) Description of the Related Art
In a data reproduction system, a readout signal obtained from a storage medium must be sampled periodically at the sampling instants synchronized with a clock signal. To perform this periodic sampling at the sampler of the data reproduction system, it is required to extract a clock signal from the readout data signal. Hereinafter, the process of extracting such a clock signal from the readout data signal will be called the clock generation.
It should be noted that, in order to reconstruct the written information, the data reproduction system must know not only the sampling frequency (1/T) at which the output of the head is sampled, but also where to take the samples within each sampling interval. Hereinafter, the choice of a sampling instant within the sampling interval of duration T will be called the clock matching or the detection of the timing phase.
Recently, data storage devices, such as magneto-optical disk drives, require an increasingly high recording density of the storage medium. As the recording density of the storage medium increases, the sampling frequency at which the readout signal is sampled becomes higher. To achieve a high recording density and a high sampling frequency than before, it is necessary that the clock matching apparatus very quickly compensates for a phase error of the clock signal to be supplied to the sampler of the data reproduction system.
However, a conventional clock matching apparatus of a data reproduction system estimates a phase error of a clock signal by using a feedback loop of the processed readout data (for example, a midpoint value of the readout signal) via a Viterbi detection module. The compensation for the phase error of the clock signal must be performed based on the result of the computation by the Viterbi algorithm which frequently requires a large amount of the computation time. For example, Japanese Laid-Open Patent Application No. 8-87,828 discloses a conventional clock matching apparatus of the above type. It is difficult for the conventional clock matching apparatus to quickly compensate for the phase error of the clock signal to be supplied to the sampler of the data reproduction system, because of the time-consuming feedback loop via the Viterbi detection module. This makes it difficult to achieve an increased sampling frequency of the data reproduction system in conformity with a higher recording density of the storage medium.